Altera Unveils Agilex 2X FPGAs, With Agilex 27 Samples Due in 2027

Altera has announced Agilex 2X, a new range of programmable chips split into four families that run from AI data centres and terabit networks down to robots and motor controllers. The first family, Agilex 27, will reach early-access customers as design software from mid-November, but engineering samples of the silicon are not expected until the second half of 2027, according to Altera’s release on 28 October.

FPGAs, or field-programmable gate arrays, are chips whose logic can be rewired after manufacture. That makes them useful wherever standards are still moving, such as networking, radio and defence. Altera’s pitch is that AI is adding more of those places, both in data centres and in machines that act in the physical world, which it calls Digital AI and Physical AI.

Four families, from 1.6 terabit Ethernet to motor control

Altera describes Agilex 2X as one portfolio spanning high-performance, mid-range and power- and cost-optimised devices:

• Agilex 27 for bandwidth-heavy work such as datapath processing, beamforming and radio-frequency processing.
• Agilex 25 for mid-range jobs including 4K and 8K video, drones and low-latency sensors.
• Agilex 23 for robotics, industrial automation and cars, with embedded processing and functional safety.
• Agilex 22 for systems that mainly need lots of input and output connections, such as board and rack control, motor control and root-of-trust chips.

All four share Altera’s Quartus Prime design software, reusable IP blocks, Arm-based processor cores and the same security foundations, including secure boot that Altera describes as post-quantum-cryptography-ready. The company has given no dates for Agilex 25, 23 or 22, and no prices.

“Digital AI and Physical AI are expanding the opportunity for programmable logic uses, as developers build systems that must adapt to rapidly evolving workloads, technologies, and standards,” said Raghib Hussain, Altera’s president and chief executive.

Agilex 27 promises 1.8 times the performance per watt of Agilex 7

Agilex 27 is the flagship and the only family with details so far. Altera says its third-generation HyperFlex fabric is “capable of delivering 1.8X gen-over-gen performance/watt improvements” over Agilex 7, the previous generation. HyperFlex places registers throughout the chip’s routing so the design software can pipeline a design without using up logic.

A new on-chip network called HyperFlow moves data at “multi terabit-per-second” rates without consuming programmable logic. Connectivity includes transceivers at up to 256 Gbps, hardened 800GbE and 1.6TbE Ethernet, PCIe 6.0 and 7.0, DDR5, LPDDR5X and LPDDR6 memory, and UCIe links for future chiplets such as data converters. Altera’s Agilex 27 product page lists an M-Series with memory inside the package, a Direct RF-Series with integrated data converters, and SoC versions with Arm Cortex-A720 and A520 cores.

On security, Altera’s Secure Device Manager acts as a hardware root of trust with secure boot, attestation, key management and anti-tamper protection, with what Altera calls crypto agility for post-quantum algorithms. Data is encrypted at line rate on the main interfaces through Ethernet MACsec, PCIe IDE and inline memory encryption.

The release says Quartus Prime support for Agilex 27 will reach early-access customers from mid-November. SiliconANGLE reported that software support is available now in Quartus Prime 26.3; what Altera says is available now in 26.3 is QuartusIQ, its AI design assistant, which works across its FPGA range.

A 2027 sample date shows the bet is on design wins, not shipments

The gap between announcement and silicon is the most telling detail. With engineering samples due only in the second half of 2027, finished products built on Agilex 27 are some way off. Announcing now lets customers start designs in software first, and a design built on one vendor’s tools and IP is costly to move later. Early access in November is about winning those choices.

The AI framing is more than a label. Altera’s product page aims Agilex 27 at network offload, AI network cards and memory orchestration beside AI accelerators: the plumbing between processors rather than the processors themselves. That fits the release’s stress on data movement. AI Tensor DSP blocks and an AI design assistant complete the story, but the release offers no comparison with rival chips, and the 1.8x figure compares Altera only with itself.

Security is where the launch connects to deadlines buyers already face. Lattice made FPGAs the root of trust in its post-quantum firmware stack this month, and NIST’s transition plan deprecates RSA and ECDSA after 2030. Chips sampled in 2027 are likely to be in service well past that date, so “post-quantum-ready” secure boot is close to a requirement for defence and telecoms buyers rather than a feature. The release does not name the post-quantum algorithms it supports, which is what those buyers will ask first.

The beamforming and 6G focus also points at operators already putting AI into radio networks, as T-Mobile and Ericsson’s beamforming trial showed.

Altera is building a roadmap ahead of a possible listing

SiliconANGLE noted that Intel sold a 51% stake in Altera to Silver Lake in April 2025 and that Altera said in September its parent had filed confidentially for an initial public offering. A four-family roadmap gives investors something to judge. Intel, meanwhile, is spending on other bets, including its planned purchase of quantum software company Classiq.

The next markers are the mid-November early-access software and the dates, still unannounced, for the three smaller families.

Sources

• Altera via Business Wire, “Altera Announces Agilex 2X, a Complete FPGA & SoC Portfolio Built for the Future of Intelligent Systems”, 28 October 2026
• Altera, “Agilex 2X – Built for the Future of Intelligent Systems” (portfolio page)
• Altera, “Agilex 27 FPGA and SoC” (product page)
• SiliconANGLE, “Altera unveils Agilex 2X, betting on AI developers to expand programmable computing”, 28 October 2026

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• NIST Finalises Post-Quantum Plan, Deprecating RSA and ECDSA After 2030
• T-Mobile and Ericsson Say AI Beamforming Lifted Peak-Hour Speeds 16% in New York