Synaptics Launches Astra SR200 xMCU Edge AI Chips

Synaptics has launched the Astra SR200 series, which it calls the first chips in “a new class of microcontrollers that runs multimodal Edge AI”. In a press release on 20 October 2026, the San Jose company said the chips are built around its Torq AI engine “featuring the Coral NPU from Google Research”.

Synaptics calls the category the “xMCU”. The pitch is that devices such as wearables, connected cameras and smart speakers can run larger AI models locally, without the power and cost of a full applications processor. The release gives no price or shipping date.

In brief

Synaptics has launched the Astra SR200 series of “xMCU” microcontrollers, with three lines rated at 200, 300 and 400 GOPS.
The chips use Google Research’s Coral NPU and what Synaptics calls “the industry’s first pairing of the Arm Cortex-M85 and Cortex-M52”.
They pair up to 8MB of SRAM with custom DRAM that “scales to hundreds of megabytes”; no price or ship date was given.

Three chips, one platform

The SR200 series launches with three pin-compatible lines that share a software development kit, Synaptics says:

Model	Rated performance	Positioning (Synaptics)
SR210	200 GOPS	Power-optimised, always-on voice and sensing
SR230	300 GOPS	Adds vision, display and optional audio
SR250	400 GOPS	Dual vision and display paths

Source: Synaptics.

According to Synaptics, conventional microcontrollers are “constrained by limited on-chip memory and compute”. The SR200 tackles this with “up to 8MB of SRAM” plus high-bandwidth custom DRAM “that scales to hundreds of megabytes”. The company claims this memory runs workloads “at one-third the power of typical system DRAM”, removing the need for costly external memory in most applications. That power figure is Synaptics’ own.

Inside the chip

The Torq AI engine integrating the Coral NPU is designed for deep-learning workloads including CNNs and transformers, Synaptics says. It uses an open-source MLIR/IREE compiler that supports standard frameworks, in place of proprietary vendor toolchains. A high-performance core scales to 800MHz, while an efficiency core handles always-on sensor fusion and low-power inference. An optional Cadence Tensilica HiFi 5 DSP adds audio processing.

On security, the chips include hardware isolation, cryptographic acceleration, anti-tamper detection and secure boot. Synaptics says the implementation conforms to “PSA Level 3 and CC EAL4+ certification targets”, which are targets rather than completed certifications. The series supports the Zephyr real-time operating system, and industrial variants add 1Gb Ethernet and two CAN-FD interfaces.

Google and customers

“Our ongoing work with Synaptics combines the Coral platform with Astra’s scalable hardware and developer ecosystem to power next-generation, wearable-class devices,” said Yossi Matias, vice president and head of Google Research.

Vikram Gupta, who runs Synaptics’ edge compute and connectivity division, said the xMCU “brings applications-processor capability into the MCU domain, running multimodal AI workloads that traditionally required Linux and discrete DRAM.”

The release also quotes Arm, Sonos, Verisure, Jorjin Technologies and Accton. Sonos’ chief supply chain officer, Kurt Preston, said Astra’s “scalable Edge compute, audio processing, and low power performance are the kind of capabilities that matter as we push what’s possible in audio.” Verisure’s chief technology officer, Cristina Rivas, said Astra processors let the company run its own vision, voice and audio models on the device itself.

Synaptics did not say when the chips will ship or what they will cost.

Our read

Putting a Google-designed NPU and hundreds of megabytes of memory into a microcontroller targets a real gap between tiny sensors and power-hungry application chips. The open compiler and Coral link may attract developers wary of vendor lock-in. But without prices, ship dates or independent power measurements, the claims remain on paper for now.