Marvell announced both chips on 13 October 2026. All specifications below are Marvell’s own claims and have not been independently tested.
Marvell has announced two new chips that help push data quickly and cleanly over copper wires inside AI data-centre racks: the Alaska E 3.2T retimer and a second-generation Alaska A 1.6T DSP for active electrical cables [1]. Marvell says both are now sampling to customers, meaning early units are going to customers for testing [1].
First, what are these chips?
A retimer is a small chip that sits partway along a high-speed electrical link. As a signal travels along a circuit board or cable it weakens and blurs. The retimer reads the tired signal, cleans it up and sends out a fresh copy, so the data can travel further without errors.
An active electrical cable (AEC) is a copper cable with a small chip built into its ends. That chip (here, a DSP, or digital signal processor) does the same clean-up job, letting a copper cable reach further than a plain “passive” one. Copper is usually cheaper and uses less power than optical fibre over short distances, which is why it is popular for links inside and between nearby AI racks.
Why it matters now
Marvell says AI systems are packing more accelerators into each rack and that switch bandwidth is moving to 102.4T. To keep up, links are moving to 224G per lane, and “at these speeds, signal integrity and copper reach become increasingly challenging” [1].
Alaska E 3.2T retimer: what Marvell claims
- 3.2 Tbps of total bandwidth over 16 lanes of 224G PAM4 [1].
- “45dB+” insertion loss compensation, which Marvell describes as “industry-leading channel reach” [1]. (Insertion loss is how much the signal fades along the link.)
- Support for Ethernet, UALink and ESUN, which are ways of linking AI chips and switches together [1].
- Aimed at on-board and backplane links, for example XPU-to-XPU and XPU-to-switch connections. (XPU is Marvell’s catch-all for AI processors such as GPUs.) [1]
Second-generation Alaska A 1.6T AEC DSP: what Marvell claims
- Built on a 3nm chip-making process [1].
- Eight lanes of 224G PAM4 [1].
- Copper reach “exceeding six meters, doubling the reach of the first-generation product” [1].
- 12.8W power draw in a 12mm x 14mm package, and “eight-watt power savings compared to 5nm designs” [1].
- Support for Ethernet, UALink and ESUN, and for straight, Y-shaped and break-out cable layouts [1].
Both chips also plug into Marvell’s RELIANT telemetry platform, which the company says gives real-time visibility into how links are performing [1]. Marvell is showing them at the OCP Global Summit 2026 [1].
What Marvell and an analyst said
“AI scale-up networks are moving rapidly to 224G signaling, making signal integrity, low latency and power efficiency critical to connecting increasingly dense infrastructure,” said Xi Wang, senior vice president and general manager of Marvell’s Connectivity Business Group [1].
ANALYST ESTIMATE: Vladimir Kozlov, founder and CEO of the research firm LightCounting, said in Marvell’s release: “The AI scale-up networking market will exceed $50 billion by 2030, driven by the transition to rack-scale and multi-rack architectures and the move to 224G signaling” [1]. This is LightCounting’s forecast, not a Marvell figure, and TSN has not seen the underlying report.
What this means
- Copper is being stretched further. If Marvell’s six-metre claim holds up, copper cables could cover more of the links between AI servers and switches.
- These are samples, not shipping products. Marvell has not given a volume-production date, prices or customer names.
- The numbers are Marvell’s. Independent tests will show whether the reach and power figures hold in real racks.
Sources
- Marvell Technology, “Marvell Bolsters Connectivity Portfolio with New 3.2T Protocol-aware Retimer and Second-generation 1.6T AEC DSP”, press release, 13 October 2026. https://investor.marvell.com/news-events/press-releases/detail/1039/marvell-bolsters-connectivity-portfolio-with-new-3-2t-protocol-aware-retimer-and-second-generation-1-6t-aec-dsp
