Arista, a data-centre switch maker, announced rack designs on 7 October 2026 that use Ethernet to link AI chips inside a rack. The release is dated 7 October; Arista’s page is stamped 8 October, 18:09. It gives no ship date, price or named buyer.
What Arista announced
Confirmed announcement; the performance figures are Arista’s claims. Arista says it is introducing “Etherlink SU-144, an Ethernet-based scale-up architecture that expands unified computing domains up to 144 accelerators (XPUs) in a single-hop network and scales to 1,024 XPUs through cross-rack topologies” [1]. An accelerator (XPU) is an AI chip such as a GPU; “single-hop” means one switch apart. Its chassis design offers, Arista says, “100–400kW liquid cooling support” [1]. It “leverages the Ethernet for Scale-up Networks (ESUN) initiative” [1], which Arista’s blog places within the Open Compute Project (OCP) [2].
Scale-up versus scale-out
“Scale-up” networking ties the chips inside one rack tightly enough to work like one big machine. “Scale-out” networking connects many racks across the data centre. Arista pitches its design as “an open, standards-based alternative to proprietary compute islands” [1]. Arista names no rival; the best-known proprietary scale-up link is Nvidia’s NVLink (TSN’s context). See also Upscale AI’s Token Fabric and the networking bottleneck.
For scale-out, Arista lists “multiple liquid-cooled 7060XE7 switches (102.4 Tbps capacity per switch)” [1]. Its Tyson Lamoreaux says: “The network in the AI era is no longer just an independent pipe between servers.” [1]
The optics claim
Arista says: “Compared to today’s OSFP-based switches, which deliver 1.6 Pb/s per rack, next-generation optics increases that to 6.5 Pb/s per rack. This massive densification translates to nearly a 50% reduction in the overall data center footprint” [1]. A petabit per second is a thousand terabits. The release ties this to next-generation optics (XPO and open CPO/NPO) and gives no test data, so these are Arista’s figures, not measured results.
The partners
The release says it was engineered with AMD, Arm, Broadcom, d-Matrix, Meta, Microsoft and Qualcomm [1]. Arista’s separate page carries a statement from each [3]. They are published by Arista and differ in scope; Meta’s says it is “pleased to collaborate with Arista on rack-scale networking solutions for our 102.4T scale-out platforms” [3]. None says it will buy SU-144. Arista plans demonstrations at the OCP Global Summit on 12 to 15 October [1].
What this does not show
- That it ships. No date, price or customer is given.
- That the numbers hold. Every figure is Arista’s own, with no independent test.
- That each partner endorses it. Their statements describe collaboration.
The Bottom Line
Arista has announced Etherlink SU-144, designs for linking up to 144 AI chips over Ethernet. It is an announcement with vendor claims: no ship date, price or buyer. The 6.5 Pb/s and roughly 50% figures are Arista’s claims, with no independent test.
Related on TSN: Watching AI Agents From the Inside, and Rewiring the AI Data Centre; The Quiet Bottleneck: Why Networking Will Make or Break the AI Race
Sources
- Arista Networks, “Arista Announces Rack-Scale Architectures for Scale-Up and Scale-Out AI Fabrics”, press release, Santa Clara, 7 October 2026 (company release; Arista’s page metadata gives 8 October 2026, 18:09; every performance figure is the company’s claim). https://www.arista.com/en/company/news/press-release/24818-pr-20261007
- Arihant Jain and Vijay Vusirikala, “Next-Gen Scale-Up Networking for AI Fabrics”, Arista blog, 7 October 2026 (company blog; source of the ESUN and OCP description). https://blogs.arista.com/blog/next-gen-scale-up-networking-for-ai-fabrics
- Arista Networks, “Rack-Scale Architectures for Scale-Up and Scale-Out AI Fabrics Quotes”, partner statements page, read 10 October 2026 (published by Arista; statements by AMD, Arm, Broadcom, d-Matrix, Meta, Microsoft and Qualcomm executives). https://solutions.arista.com/rack-scale-architectures-for-scale-up-and-scale-out-ai-fabrics-quotes
